Starting to back up all the age old docs, guides, books, links and what not before there lost forever and heres the first. I refound it today while looking up some other info. A guide to upgrade the none 'E' versions of the Atari ST (F,FM,STFM) to either 2/2.5/4Mb ram. This will be part of a series ( I hope)

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A 2.5MByte RAM Expansion for the Atari ST

by Christopher Hicks (89cmh@uk.ac.cam.eng)

Introduction

This document details the addition of an extra 2MBytes of RAM to a standard 520/1040 STF/STFM. The motherboard I upgraded is marked C070789-001 REV D (1040 STF), but this procedure should be OK for other revisions, except that the IC numbers may be different.

The existing RAM consisted of thirty-two 256K by 1 DRAMs, mounted under the power supply. This procedure replaces sixteen of these with two 1MByte SIPs, giving a total of 2.5MBytes.

Disclaimer

Although this procedure worked perfectly for me, I cannot guarantee that anyone else can perform this upgrade without damaging their computer. I therefore disclaim any responsibilty for any damage that may occur as a result of attempting this upgrade. It will also void any warranty on your computer.

On a more positive note, there is no reason why someone who is experienced in wielding a soldering iron, and has done some electronic construction/troubleshooting, should not be able to perform this upgrade successfully.

Summary

The ST's memory management unit (MMU) can support two banks of RAM (upper and lower). These may each contain 512KBytes or 2MBytes. In addition the upper bank may be empty. This arrange- ment gives rise to the following memory configurations:

 
          Lower Bank     Upper Bank     Total
          ==========     ==========     =====
     1.     512 kB          ---         512 kB
     2.     512 kB         512 kB         1 MB
     3.       2 MB          ---           2 MB
     4.       2 MB         512 kB       2.5 MB
     5.     512 kB           2 MB       2.5 MB
     6.       2 MB           2 MB         4 MB

This upgrade converts a machine from configuration 1 or 2 to configuration 5. An extra address line is required for the 2 MB bank. This is obtained from the MMU (U56) pin 64.

Device Pin Diagrams

1. 256kbit DRAM

 
      ------\_/------
   A8 |1          16| GND
    D |2          15| CAS
   WE |3          14| Q
  RAS |4          13| A6
   A0 |5          12| A3
   A2 |6          11| A4
   A1 |7          10| A5
  Vcc |8           9| A7 
      ---------------

2. 1MByte SIP

 
     1     Vcc           11    A4            21    WE
     2     CAS           12    A5            22    GND
     3     DQ0           13    DQ3           23    DQ6
     4     A0            14    A6            24    NC
     5     A1            15    A7            25    DQ7
     6     DQ1           16    DQ4           26    Q8
     7     A2            17    A8            27    RAS
     8     A3            18    A9            28    CAS8
     9     GND           19    NC            29    D8
     10    DQ2           20    DQ5           30    Vcc

NB Pins 26, 28 and 29 refer to the ninth bit required for IBM PC systems. This bit is not required on the ST upgrade.

 
                ______________________________
               |                              |
               |   Chips mounted this side    |
               |                              |
               |______________________________|
                ||||||||||||||||||||||||||||||
               1                              30

Pin Functions

 
 A0 - A9     Address inputs (row/column multiplexed)
 CAS         Column address strobe
 RAS         Row address strobe
 D           Data input
 Q           Data output
 DQ0 - DQ7   Data combined inputs/outputs
 WE          Write Enable input
 Vcc         Power (+5V)
 GND         Ground (0V)
 NC          Not connected 

Parts Required

1. Two 1M x 8, or 1M x 9 SIPs, 120ns or faster
2. Two 16 pin and two 14 pin IC sockets
3. A small piece of veroboard (big enough to mount the two SIPs)
4. A few dozen short bits of wire (a shredded scrap of ribbon cable is ideal - lots of colours for easy identification!)

Total cost - about 80 pounds including VAT!

Precautions

The motherboard and SIPs may be damaged by static electricity, so don't work on this project wearing synthetic clothes and rubber shoes on a nylon carpet etc... Seriously though, no damage should occur if you are reasonably careful (use a grounded soldering iron, and don't work on a highly waxed or polished surface, for example).

Procedure

1. Remove the motherboard from the computer, and identify the RAM chips (U 3>6, 10>13, 18>25, 27>30, 34>37, 39>42, 44>47 on my 1040STF). On a 520 only half of these will be present, and step 2 may be skipped.
2. Desolder and remove the upper bank of DRAMs. These are scrap, so don't worry about damaging them, but do take care not to damage any tracks on the motherboard. On my 1040 these were the right-hand 16 chips (nearest the FDD), though I know that on some boards (marked REV 4 ?) it is the 16 nearest the rear of the computer. (The way to tell if you are unsure is that all the pin 4s of each bank are connected together, but the two banks are separate.) When these DRAMs have been removed, the computer should work as a 520ST. If it doesn't, the safest recourse is to buy thirty-two 16-pin IC sockets, and sixteen 256k x 1 bit DRAMS. Remove all the DRAMS from the motherboard, and replace them with sockets. Then fit one of the new DRAMS in each of sixteen sockets, and move them until you find a combination that works. You then have a 512k lower bank, and an empty upper bank as required.
3. Mount the four IC sockets on the veroboard, end to end, and butted up together, so as to make two 30-pin SIP sockets. The connections on these will, from now on, be refered to as SIP1 pins 1 thru 30, and SIP2 pins 1 thru 30.
4. Break the veroboard tracks between the following pins on SIPs 1 and 2: 2,3,6,10,13,16,20,23,25,26. This operation separates the data and CAS lines on the two SIPs.
5. Connect together the following veroboard tracks: 22, 28, 29. This disables bit 8 if present, leaving bits 0>7 for the ST.
6. Decide where the expansion board is to go. Mine is in the space normally occupied by the TV modulator and associated circuitry. Bear in mind that leads to the board should be no more than about 6 inches long to avoid capacitance problems.
7. Back to the motherboard... Using a continuity tester you should find that the CAS lines (pin 15) of the removed DRAMs are connected together in two groups of eight. Take a short wire from one of these groups of pin 15s to SIP1 pin 2, and another from the other group of pin 15s to SIP2 pin 2.
8. Take wires from the pin 2s of the first group of eight DRAMs to pins 3, 6, 10, 13, 16, 20, 23, 25 on SIP1. Similarly connect the pin 2s of the second group of DRAMs to pins 3, 6, 10, 13, 16, 20, 23, 25 on SIP2. The databus is now connected up, and the complicated bit is over. Note that it is essential that CAS (pin 15) and D (pin 2) of each DRAM are taken to the same SIP.
9. Now wire A0 > A8, WE, Vcc, GND and RAS from the SIP board to the similarly named pin of any of the vacated DRAM slots.
10. Lastly wire pin 18 of the SIP board to pin 64 of the MMU (U56 on my board). To aid identification, the part no of my MMU is C025912-38. Pin numbers are marked on the board.
11. Make sure there are no shorts, and check all the connections. Insulate the back of the SIP board (eg by taping a piece of card over it) and insert the SIPs.
12. Reassemble the computer and hey presto - a 2.5Meg ST.
13. Give a copy of this documentation to anyone you please, for them to try the same upgrade.
14. When you run out of memory again, repeat exactly the same procedure, replacing the other sixteen DRAMS, and you will find that you have a 4 Meg ST - what could be simpler?

If you make use of this upgrade, please drop me a line at my email address, and I will send you details of any other hardware hacks I succeed with! Good luck...

P.S. I don't have transatlantic e-mail facility. So, if sent from the other side of the Atlantic, it is most likely that I shall not be recieving it. However, if you have any sugestion or criticism, please send to the address M.A.Rahin@lut.ac.uk, who will redirect to me.

 
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                                        | The Final Value Theorem:
  Christopher Hicks 89cmh@uk.ac.cam.eng |  The answer you get is
                    cmh21@uk.ac.cam.phx |     always wrong...
                                        |
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